High Power Density High Efficiency Electrolytic-Free Single-Phase Led Drivers

Pervaiz, Saad

Graduate Thesis Or Dissertation

High Power Density High Efficiency Electrolytic-Free Single-Phase Led Drivers Public Deposited

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Citeable URL: https://scholar.colorado.edu/concern/graduate_thesis_or_dissertations/qn59q415v

Abstract

Owing to their high efficiencies and longer lifetimes, LEDs are increasingly replacing conventional light sources in various applications. Many of these applications require high-power-density and long-life LED drivers to fully benefit from the longer-life advantage provided by the LEDs. This thesis presents high-power-density, high-efficiency and longer-life LED drivers suitable for such applications. The proposed LED drivers eliminate the use of shorter-life electrolytic capacitors used for twice-line-frequency energy buffering with film/ceramic capacitor based stacked switched capacitor (SSC) energy buffers. The utilization of the SSC energy buffer significantly reduces the passive volume of the twice-line-frequency energy buffer compared to the use of single film/ceramic capacitors. A comprehensive capacitance-ratio optimization scheme is presented that optimally selects the ratios of the capacitors utilized in the SSC energy buffer to minimize the total energy stored in the buffer. This optimization scheme is further improved by incorporating the energy density of commercially available capacitors to minimize the passive volume of the SSC energy buffer. A simplified control methodology for interfacing the SSC energy buffer with a PFC converter is also presented. The proposed optimization and control methodologies are applied to single-stage and two-stage LED driver designs utilizing SSC energy buffers. For the single-stage LED driver, a flyback based step-down PFC stage is utilized. It is demonstrated that the SSC energy buffer successfully replaces traditional electrolytic capacitors in this design while maintaining comparable efficiency and resulting in a 3x reduction in passive volume. For the two-stage LED driver, a comprehensive design methodology that co-optimizes the efficiency and volume of all the stages of the LED driver is presented. Based on the optimization results, a totem-pole bridgeless boost based PFC stage and a stacked-inverter based LLC resonant dc-dc stage are utilized with a hybrid film-ceramic based SSC energy buffer connected across the intermediate dc bus. A 600-W universal-input, 24-V output two-stage LED driver based on the optimized designs is built and tested. The front-end PFC stage of the LED driver achieves a peak efficiency of 98%, while the second-stage LLC dc-dc converter achieves a peak efficiency of 95%. The LED driver achieves a power density of 28 W/in³.

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